Delta Tau PMAC2 PCI User Manual Page 83

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PMAC2 User Manual
Setting Up PMAC2 for MLDT Feedback 75
To produce the desired pulse output frequency, the following formula can be used (assuming a 16-bit M-
variable definition):
)kHz(Freq_PFMCLK
536,65
07Mn
)kHz(OutputFreq =
or:
)kHz(Freq_PFMCLK
)kHz(OutputFreq
*536,6507Mn =
Note:
The servo update time for the motor using the MLDT should be at least as high as
the output time set here (the servo frequency should be as low or lower than the
output frequency). The servo interrupt time for PMAC2 is set up with I900, I901,
and I902; the default is 442 µsec. The servo update time for an individual Motor x
can be extended in increments of the servo interrupt time with Ix60.
To produce a pulse output frequency of 1.667 kHz with the default PFMCLK frequency of 9.83 MHz, we
calculate:
11
380,9
667.1
*536,6507Mn =
To write this value to the register, a power-on PLC routine is suggested; this can also be done with on-
line commands from the host computer. A two-step power-on sequence is required, because PMAC2 will
initially try to read the absolute position before this value is in place. Therefore, it is necessary to write
the value to the register, then make the card do a software reset. Sample PLC code to do this for Channel
1, using the above example value, is:
OPEN PLC 1 ; PLC 1 is first program to execute
CLEAR
IF (M107!=11) ; Pulse frequency not set
M107=11 ; Set pulse frequency
CMD$$$ ; Do a software reset on the card
ELSE
{other reset actions}
ENDIF
DISABLE PLC 1 ; So will not execute again
PFM Pulse Width: I904 and I908
The width of the output pulse is controlled by the PFMCLK frequency with I904 for channels 1-4; with
I908 for channels 5-8. I904 and I908 specify the pulse width as the number of PFMCLK cycles. At the
default PFMCLK frequency of 9.83 MHz, the default I904/I908 value of 15 produces a 1.5 µsec output
pulse width. This should be satisfactory for most MLDT devices. When using the RPM format or
equivalent (see Signal Format, above), the pulse width must be large enough to enclose the rising edge of
the returned start pulse.
FM Format Select: I9n6
In order for the C-register circuitry of Channel n to output a PFM pulse train rather than a PWM pulse
train, variable I9n6 must be set to 2 or 3. Most commonly, I9n6 will be set to 3, so that the A and B
registers for Channel n output DAC signals rather than PWM.
Note:
Oone channel of PMAC2 cannot be used simultaneously for direct PWM control
of a motor and for MLDT pulse generation. Direct PWM control of a motor
automatically writes to the channel’s A, B, and C registers every phase cycle.
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