Delta Tau PMAC2 PCI User Manual Page 43

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PMAC2 User Manual
Setting Up PMAC2 for Sine-Wave Output Control 35
Hardware Clock Frequency Control: I903, I907
I903 determines the frequency of four hardware clock signals use for machine interface channels 1-4;
I907 does the same for machine interface channels 5-8. These can probably be left at the default values.
The four hardware clock signals are SCLK (encoder sample clock), PFM_CLK (pulse frequency
modulator clock, DAC_CLK (digital-to-analog converter clock), and ADC_CLK (analog-to-digital
converter clock).
Only the DAC_CLK signal is directly used with the sine-wave output, to control the frequency of the
serial data stream to the DACs. The default DAC clock frequency of 4.9152 MHz is suitable for the
DACs on the recommended Acc-8E analog interface board. Refer to the I903 and I908 descriptions for
detailed information on setting these variables.
The encoder SCLK frequency should be at least 20% greater than the maximum count (edge) rate that is
possible for the encoder on any axis. Higher SCLK frequencies than this minimum may be used, but
these make the digital delay anti-noise filter less effective.
DAC Strobe Control: I905, I909
PMAC2 generates a common DAC strobe word for each set of 4 machine interface channels. It does this
by shifting out a 24-bit word each phase cycle, one bit per DAC clock cycle, most significant bit first.
I905 contains this word for Channels 1-4; I909 contains this word for Channels 5-8. The default values of
$7FFFC0 are suitable for use with the DACs on the recommended Acc-8E analog interface board.
Parameters to Set Up Per-Channel Hardware Signals
For each machine interface channel n (n = 1 to 8) used for sine wave analog outputs, a few I-variables
must be set up properly.
Encoder Decode Control: I9n0
I9n0 must be set up to decode the commutation encoder properly. Almost always a value of 3 or 7 is used
to provide times-4 decode of a quadrature encoder (4 counts per encoder line). The difference between 3
and 7 is the direction sense of the encoder; set this variable so the motor counts up in the direction wanted.
The polarity sense of the Ix72 commutation phase angle parameter must match that of I9n0 for the
particular wiring; if it is wrong, it will lock into a position rather than generate continuous torque. A test
for determining this polarity match is given below. Remember that if I9n0 is changed on a working
motor, also change Ix72.
Output Mode Control: I9n6
I9n6 must be set to 1 or 3 to specify that outputs A and B for Channel n are in DAC mode, not PWM. A
setting of 1 puts output C (not used for servo or commutation tasks in this mode) in PWM mode; a setting
of 3 puts output C in PFM mode.
Output Inversion Control: I9n7
I9n7 controls whether the serial data streams to the DACs on Channel n are inverted or not. The default
value of 0 (non-inverted) is suitable for use with the recommended Acc-8E analog interface board.
Inverting the bits of the serial data stream has the effect of negating the DAC voltage. In a commutation
algorithm this is equivalent to a 180
o
phase shift, which would produce runaway if the system were
working properly before the inversion.
Parameters to Set Up Motor Operation
Several I-variables must be set up for each Motor x to enable and configure the sine-wave output for that
motor. Of course, Ix00 must be set to 1 for any active motor, regardless of the output mode for that
motor.
Commutation Enable: Ix01
Ix01 is set to 1 to activate the commutation algorithms for Motor x.
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