Delta Tau PMAC2 PCI User Manual download pdf (Page 75)

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PMAC2 User Manual

Using PMAC2 with MACRO Interface 67

Ring Cycle Frequency Control

The MACRO ring communications cycle is started on the phase clock interrupt of the synchronizing

master. The phase clock frequency is set in two steps; first the MaxPhase’ clock frequency is set, the

phase clock is created by dividing down the MaxPhase clock.

The MaxPhase clock frequency is set by I992 on a PMAC2 Ultralite (or I900 on regular PMAC2)

according to the formula:

3992I*2

8.964,117

)kHz(MaxPhase

The phase clock frequency is determined by the MaxPhase frequency and I997 on a PMAC2 Ultralite (or

I901 on a regular PMAC2) according to the formula:

1997I

)kHz(MaxPhase

)kHz(Phase

The default value for I992 (I900) of 6527 produces a MaxPhase frequency of 9.03 kHz. The default value

for I997 (I901) of 0 makes the phase frequency equal to the MaxPhase frequency. These values are

suitable for most applications. If there are multiple PMAC2s on a single MACRO ring, all should have

the same setting of these variables.

Feedback Processing in Encoder Conversion Table

The position feedback from a MACRO node must be processed through the encoder conversion table

before it is used in the servo loop. The default conversion table must be modified to handle this feedback.

Newer versions of the PMAC Executive program for Windows (Nov. 96 or newer) fully support this

modification in the Configure Conversion Table screen; otherwise, direct memory-write commands can

be used as explained in this section.

Type 0 Nodes

In a Type 0 MACRO node, the position feedback comes in the high 16 bits (bits 8-23) of a 24-bit register,

with a count as the LSB (bit 8). The PMAC2 conversion table must treat this data as parallel feedback,

and shift the data right 3 bits, because the output of the conversion table should start at bit 5. The PMAC

servo algorithms that use the results of the conversion table expect 5 bits of fractional count data.

This parallel, shift-right conversion uses format $2C or $3C for data appearing in Y-registers (not filtered

or filtered, respectively), and format $6C or $7C for data appearing in X-registers (not filtered or filtered,

respectively). Due to MACRO’s own error detection schemes, the use of filtering generally is not

necessary.

Type 1 Nodes

In a Type 1 MACRO node, the position feedback comes in the 24-bit register for the node, with a count in

Bit 5, and fractional count data in Bits 0 - 4. The PMAC 2 conversion table must treat this data as parallel

feedback, and pass it through unshifted, because the output of the conversion table should have a count at

Bit 5.

This parallel, unshifted conversion uses format $28 or $38 for data appearing in Y-registers (not filtered

or filtered, respectively. PMAC2 does not support the Type 1 protocol with X-registers. Due to

MACRO’s own error detection schemes, the use of filtering generally is not necessary.

Both Protocol Types

The unfiltered parallel conversion table entry takes two lines (addresses) in the table. The first setup word

is contains the conversion method format and the source register address. In the Type 0 MACRO

protocol, the address of the position feedback register for a node depends on the mode of operation for

that node. It is different in direct PWM mode because phase current information is also sent back.

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Delta Tau PMAC2 PCI User Manual Page 75

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